1. Field of the Invention
The present invention relates to the field of low distortion, high frequency amplifiers and, more particularly to an integrated on-board automated alignment circuit for low distortion, high frequency amplifiers.
2. Description of the Related Art
In the amplification of a multi-tone high frequency input signal, such as the signals present in a wireless communication application, undesirable intermodulation frequencies are typically produced, resulting in distortion of the output signal (i.e., the amplified input signal). The resulting distortion, typically referred to as intermodulation distortion (IMD), is undesirable and must be eliminated to obtain a distortion free output signal. Recently, low distortion amplifiers capable of amplifying the multi-tone signals while substantially eliminating the intermodulation distortion of the output signal have been developed to counteract the IMD problem.
FIG. 1 illustrates a low distortion amplifier circuit 10 capable of amplifying multi-tone input signals RF_In while substantially minimizing the intermodulation distortion of the output signal RF_Out. The circuit 10 contains a first amplifier circuit 30 comprising a first attenuator 32, phase shifter 34 and amplifier 36 and a second amplifier circuit 20 comprising a second attenuator 22, phase shifter 24 and amplifier 26. The circuit 10 also contains third and fourth attenuators 12, 44, a third phase shifter 46, four couplers 14, 18, 42, 52, and two delay circuits 16, 48.
The input of the third attenuator 12 is connected to receive the input signal RF_In. The third attenuator has a control variable AttIn that can be used to adjust the overall gain of the circuit 10 (as will be described below with reference to FIGS. 3a-3c). The output of the third attenuator 12 is connected to an input port of the first coupler 14, which is configured as a 10 dB power splitter. The coupler 14 is typically a conventional parallel coupler line type that samples power from a direct port and a coupled port of the coupler 14. The direct port of the coupler 14 is connected to an input of the first delay circuit 16. The coupled port of the coupler 14 is connected to an input of the first attenuator 32 of the first amplifier circuit 30. An output of the first delay circuit 16 is connected to the input port of the second coupler 18, which is configured as a 10 dB subtracting device (i.e., it subtracts signal S5 from signal S2 as described below in more detail). The second coupler 18 is typically a conventional parallel coupler line type coupler. The direct port of the coupler 18 is connected to an input of the second attenuator 22 of the second amplifier circuit 20.
The output of the second attenuator 22 is connected to the input of the second phase shifter 24. The output of the second phase shifter 24 is connected to an input of the second amplifier 26. The amplifier 26 is typically a conventional high frequency amplifier operating in class A, AB or B and having a gain GainA on the order of 30 dB to produce output power on the order of 50 W. The output of the second amplifier 26 is connected to the coupled port of the fourth coupler 52, which is configured as a 3 dB combiner. The fourth coupler 52 can be a conventional Wilkinson coupler with proper phase adjustment.
The output of the first attenuator 32 is connected to the input of the first phase shifter 34. The output of the first phase shifter 34 is connected to the input of the first amplifier 36. The first amplifier 36 is typically a conventional high frequency amplifier operating in class A, AB or B and having a gain GainB on the order of 30 dB to produce output power on the order of 50 W. The output of the first amplifier 36 is connected to the input port of the third coupler 42, which is configured as a conventional 30 dB splitter. The direct port of the third coupler 42 is connected to the input of the second delay circuit 48. The output of the second delay circuit 48 is connected to the direct port of the fourth coupler 52. The coupled port of the third coupler 42 is connected to the input of the fourth attenuator 44. The output of the fourth attenuator 44 is connected to the input of the third phase shifter 46. The output of the third phase shifter 46 is connected to the coupled port of the second coupler 18.
In operation, an applied input signal RF_In is attenuated by the third attenuator 12 and then split into two signals S1, S2 by the first coupler 14. Typically, RF_In is a multi-tone high frequency signal consisting of sinusoidal components of a first fundamental frequency and a second fundamental frequency, which is higher than the first fundamental frequency. Both frequencies, however, lie within standard wireless communication frequency bands (e.g., 800 Mhz to 960 Mhz), although the circuit 10 can be used in other applications with lower or higher frequency bands.
Signal S1 is applied to the first amplifier circuit 30 where it is amplified forming amplified signal S3 at the output of the first amplifier 36. Signal S3 will contain some undesirable intermodulation distortion products (IMD) which are in phase with the desired RF portion of the signal. Signal S3 is then input into third coupler 42, which outputs two signals S4, S8 representing the amplified signal S3. Signal S4 is attenuated by the fourth attenuator 44 and phase shifted 180 degrees by the third phase shifter 46 forming signal S5. Signal S5 will be 180 degrees out of phase with delayed signal S2 (described below), but with a small RF portion amplitude. Signal S5 is applied to the second coupler 18. Signal S8 is applied to the second delay circuit 48, which introduces a time delay and thus, outputs a delayed S8 to the fourth coupler 52. Signal S8 will contain a desirable RF portion and an undesirable IMD portion.
Signal S2 is applied to the first delay circuit 16, which introduces a time delay and thus, outputs a delayed S2 to the second coupler 18. The delay ensures that the signals S2 and S5 arrive at the second coupler 18 at the same time. The output of the second coupler 18, signal S6, represents the subtraction of signal S5 from signal S2. Here, only the small RF portion of signal S5 is subtracted due to the second coupler 18. The RF portion of S6 is approximately equal in amplitude, but 180 degrees out of phase with the RF portion of signal S1. S6 also contains an IMD portion from signal S5 since signal S2 does not contain IMD and no cancellation occurs. S6 is amplified by the second amplifier circuit 20 forming signal S7, which is applied to the fourth coupler 52. The IMD portion of signal S6 will be attenuated by the new IMD portion introduced by the second amplifier 26. Thus, signal S7 will have an IMD portion equal in amplitude, but 180 degrees out of phase with the IMD portion in signal S8. The RF portion of signal S7, however, will be in-phase with the RF portion of signal S8.
The desired RF signal portion of the two signals S8 and S7 present at the fourth coupler 52 are in phase with each other and thus, are combined by the fourth coupler 52 to form RF_Out with a high gain (with respect to the input RF_In). The IMD portion of signal S8 will be equal in amplitude to the IMD portion of signal S7, but they will be 180 degrees out of phase with each other and thus, the IMD is substantially canceled. Accordingly, the circuit 10 has a large output power gain with substantially minimized intermodulation distortion.
In order for the circuit 10 to operate properly, the attenuators 22, 32, 44 and phase shifters 24, 34, 46 must be properly balanced. Each attenuator 22, 32, 44 has control variables AttA, AttB, AttF, respectively, that can be set by a system user. Similarly, each phase shifter 24, 34, 46 has control variables PhaseA, PhaseB, PhaseF, respectively, that can also be set by the system user. A special alignment procedure, performed off-line in a laboratory or on the production line, is necessary to find the proper setting of these variables. To speed-up production time, the alignment is typically performed at one frequency and one temperature. The obtained variables are placed into a look-up table and projected to obtain circuit performance for the remainder of the circuit's operational range.
This approach, however, may generate inaccurate predictions due to several factors, such as unequal gains, IMD performance and temperature response of the amplifier circuits 20, 30. In addition, the "double function" of the attenuators and phase shifters (i.e., attenuators often introduce a phase shift as well as attenuating, while phase shifters alter their insertion lags during phase shifting both as a function of their control variables), tend to introduce improper compensations leading to inefficient operation of the low distortion amplifier circuit. Accordingly, there is a desire and need for a continuous automated alignment mechanism for low distortion, high frequency amplifiers.
In addition, it is desirable that any alignment mechanism be integrated on-board with the amplifier so that the alignment can occur out in the field during normal operation of the amplifier, as opposed to being performed in a laboratory or at the production line. Accordingly, there is a desire and need for an integrated onboard alignment mechanism for a low distortion, high frequency amplifier.